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北京大学 [27]

微电子研究所 [1]

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期刊论文 [16]

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	Design Optimization for Digital Circuits Built With Gate-All-Around Silicon Nanowire Transistors 期刊论文 ieee电子器件汇刊, 2012 Liu, Yuchao; Huang, Ru; Wang, Runsheng; Zhuge, Jing; Xu, Qiumin; Wang, Yangyuan 收藏 \| 浏览/下载：3/0 \| 提交时间：2015/11/10 Delay design optimization digital circuit applications layout area power ring oscillator (RO) silicon nanowire transistors (SNWTs) CARRIER TRANSPORT MOSFETS SI PERFORMANCE INTEGRATION TECHNOLOGY DEVICES MEMORY
	Self-Heating Effects in Gate-all-around Silicon Nanowire MOSFETs: Modeling and Analysis 其他 2012-01-01 Huang, Xin; Zhang, Tianwei; Wang, Rusheng; Liu, Changze; Liu, Yuchao; Huang, Ru 收藏 \| 浏览/下载：5/0 \| 提交时间：2015/11/13 Gate-all-around (GAA) silicon nanowire MOSFET (SNWT) self-heating effect equivalent thermal network DEVICES PERFORMANCE
	HCI and NBTI induced degradation in gate-all-around silicon nanowire transistors 期刊论文 microelectronics reliability, 2011 Huang, Ru; Wang, Runsheng; Liu, Changze; Zhang, Liangliang; Zhuge, Jing; Tao, Yu; Zou, Jibin; Liu, Yuchao; Wang, Yangyuan 收藏 \| 浏览/下载：3/0 \| 提交时间：2015/11/10 MOSFETS RELIABILITY INTEGRATION CARRIER
	Predictive 3-D Modeling of Parasitic Gate Capacitance in Gate-all-Around Cylindrical Silicon Nanowire MOSFETs 期刊论文 ieee电子器件汇刊, 2011 Zou, Jibin; Xu, Qiumin; Luo, Jieying; Wang, Runsheng; Huang, Ru; Wang, Yangyuan 收藏 \| 浏览/下载：3/0 \| 提交时间：2015/11/10 Modeling parasitic gate capacitance Schwarz-Christoffel mapping silicon nanowire MOSFETs (SNWTs) source/drain extension (SDE) SOURCE/DRAIN UNDERLAP FRINGE CAPACITANCE CARRIER TRANSPORT CMOS DEVICES PERFORMANCE OPTIMIZATION TRANSISTORS TECHNOLOGY INTEGRATION RESISTANCE
	Experimental Demonstration of Current Mirrors Based on Silicon Nanowire Transistors for Inversion and Subthreshold Operations 期刊论文 ieee电子器件汇刊, 2011 Huang, Ru; Zou, Jibin; Wang, Runsheng; Fan, Chunhui; Ai, Yujie; Zhuge, Jing; Wang, Yangyuan 收藏 \| 浏览/下载：3/0 \| 提交时间：2015/11/10 Analog and mixed-signal application current mirror (CM) silicon nanowire transistor (SNWT) subthreshold operation CARRIER TRANSPORT INTEGRATION MOSFETS DEVICES DESIGN
	New Observations and Impacts of Diameter-Dependent Annealing Effects in Silicon Nanowire Transistors 其他 2011-01-01 Wang, Runsheng; Yu, Tao; Huang, Ru; Ding, Wei; Wang, Yangyuan 收藏 \| 浏览/下载：5/0 \| 提交时间：2015/11/13 DENSITY-GRADIENT MODEL DESIGN OPTIMIZATION NANOSCALE MOSFETS CARRIER TRANSPORT ION-IMPLANTATION CMOS TECHNOLOGY DRIFT-DIFFUSION SIMULATION PERFORMANCE
	High-Performance Si Nanowire Transistors on Fully Si Bulk Substrate From Top-Down Approach: Simulation and Fabrication 期刊论文 ieee 纳米技术汇刊, 2010 Zhuge, Jing; Tian, Yu; Wang, Runsheng; Huang, Ru; Wang, Yiqun; Chen, Baoqin; Liu, Jia; Zhang, Xing; Wang, Yangyuan 收藏 \| 浏览/下载：4/0 \| 提交时间：2015/11/10 CMOS scaling self-heating effects silicon (Si) nanowire transistor (SNWT) THERMAL-CONDUCTIVITY MOSFETS LAYERS
	Investigation of Nanowire Line-Edge Roughness in Gate-All-Around Silicon Nanowire MOSFETs 期刊论文 ieee电子器件汇刊, 2010 Yu, Tao; Wang, Runsheng; Huang, Ru; Chen, Jiang; Zhuge, Jing; Wang, Yangyuan 收藏 \| 浏览/下载：3/0 \| 提交时间：2015/11/10 Intrinsic parameter fluctuation line-edge roughness (LER) silicon nanowire MOSFET (SNWT) variability INTRINSIC PARAMETER FLUCTUATIONS FINFET MATCHING PERFORMANCE CARRIER TRANSPORT CMOS TECHNOLOGY IMPACT TRANSISTORS DEVICES DECANANOMETER VARIABILITY INTEGRATION
	Negative-Bias Temperature Instability in Gate-All-Around Silicon Nanowire MOSFETs: Characteristic Modeling and the Impact on Circuit Aging 期刊论文 ieee电子器件汇刊, 2010 Liu, Changze; Yu, Tao; Wang, Runsheng; Zhang, Liangliang; Huang, Ru; Kim, Dong-Won; Park, Donggun; Wang, Yangyuan 收藏 \| 浏览/下载：6/0 \| 提交时间：2015/11/10 Circuit aging negative-bias temperature instability (NBTI) modeling process variations silicon nanowire MOSFET (SNWT) NBTI DEGRADATION MOS DEVICES TRANSISTORS INTERFACE RELIABILITY TRANSPORT DYNAMICS CARRIER
	Investigation of gate-all-around silicon nanowire transistors for ultimately scaled CMOS technology from top-down approach 期刊论文 frontiers of physics in china, 2010 Huang, Ru; Wang, Run-sheng 收藏 \| 浏览/下载：3/0 \| 提交时间：2015/11/13 silicon nanowire transistor (SNWT) gate-all-around (GAA) CMOS top-down quasi-ballistic transport self-heating effect variability LOW-FREQUENCY NOISE DESIGN OPTIMIZATION CARRIER TRANSPORT METAL GATES MOSFETS RELIABILITY VARIABILITY EXTRACTION DEVICES

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