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| A Self-Indexed Register File for Efficient Arithmetical Computing Hardware 会议论文 UK, 2017-10 作者: Lei Yang; Shaolin Xie; Zijun Liu; Xueliang Du; DongLin Wang 收藏  |  浏览/下载:28/0  |  提交时间:2018/05/07
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| A reconfigurable ASIC-like image polyphase interpolation implementation method 会议论文 ShenZhen, 2017-7 作者: Lei Yang; Ruoshan Guo; Shaolin Xie; Donglin Wang 收藏  |  浏览/下载:22/0  |  提交时间:2018/05/07
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| Optimization of clock mesh based on wire sizing variation 会议论文 Seoul, South Korea, 2017-11 作者: Meng Liu; Zhiwei Zhang; Wenqin Sun; Donglin Wang 收藏  |  浏览/下载:20/0  |  提交时间:2019/01/15 |
| A novel obstacle-aware multiple fan-out symmetrical clock tree synthesis 期刊论文 IEICE ELECTRONICS EXPRESS, 2017, 卷号: 14, 期号: 20 作者: Liu, Meng; Zhang, Zhiwei; Sun, Wenqin; Wang, Donglin 收藏  |  浏览/下载:13/0  |  提交时间:2018/10/10
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| Second Order Difference Aided CRC Check Stopping Criterion for Turbo Decoding 会议论文 Kunming, China, May 20-21, 2017 作者: Zhao, Xuying; Wang, Xiaoqin; Wang, Donglin 收藏  |  浏览/下载:24/0  |  提交时间:2017/12/07
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| Obstacle-aware symmetrical clock tree construction 会议论文 Boston, 2017-8 作者: Meng Liu; Zhiwei Zhang; Wenqin Sun; Donglin Wang 收藏  |  浏览/下载:13/0  |  提交时间:2019/01/15 |
| An automatic and practical flow for clock tree construction in physical design 会议论文 Beijing, 26-28 Aug. 2016 作者: Meng Liu; Wenqin Sun; Wuqi Wang; Zhiwei Zhang; Donglin Wang 收藏  |  浏览/下载:19/0  |  提交时间:2017/10/09 |