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浏览/检索结果: 共5条，第1-5条 帮助 限定条件 发表日期：2018     已选(0)清除 条数/页：5101520253035404550556065707580859095100   排序方式：请选择作者升序作者降序题名升序题名降序发表日期升序发表日期降序提交时间升序提交时间降序 A Low-Power Pipelined-SAR ADC Using Boosted Bucket-Brigade Device for Residue Charge Processing 期刊论文 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2018, 卷号: 26, 页码: 1763-1776 作者:  Zhang, Hong;  Sun, Junqiang;  Zhang, Jie;  Zhang, Ruizhi;  Carusone, Anthony Chan 收藏  |  浏览/下载：5/0  |  提交时间：2019/11/19 Boosted  low power  residue processing  pipelined-successive approximation register (SAR) analogto-digital converter (ADC)  bucket-brigade device (BBD)   A High-Speed 2-bit/Cycle SAR ADC With Time-Domain Quantization 期刊论文 IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2018, 卷号: 26, 期号: 10, 页码: 2175-2179 作者:  Qiu, Lei;  Yang, Chuanshi;  Wang, Keping*;  Zheng, Yuanjin 收藏  |  浏览/下载：11/0  |  提交时间：2019/12/04 2 bit/cycle  analog-to-digital converter (ADC)  nonbinary  successive approximation register (SAR)  time-domain quantization   Passive Noise Shaping in SAR ADC With Improved Efficiency 期刊论文 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2018, 卷号: 26, 页码: 416-420 作者:  Song, Yan;  Chan, Chi-Hang;  Zhu, Yan;  Geng, Li;  Seng-Pan, U. 收藏  |  浏览/下载：2/0  |  提交时间：2019/11/26 successive approximation register (SAR)  passive noise shaping (PNS)  delta sampling  oversampling  Analog-to-digital converter (ADC)   A 0.6-V 10-bit 200-kS/s SAR ADC With Higher Side-Reset-and-Set Switching Scheme and Hybrid CAP-MOS DAC 会议论文 作者:  Zhang, Hongshuai;  Zhang, Hong;  Sun, Quan;  Li, Jijun;  Liu, Xipeng 收藏  |  浏览/下载：5/0  |  提交时间：2019/11/26 low power  hybrid DAC  energy efficient  HSRS  native MOS  successive approximation register  area efficient  Analog-to-digital convertor  low voltage   V-aq-based tri-level switching scheme for SAR ADC 期刊论文 ELECTRONICS LETTERS, 2018, 卷号: 54, 页码: 66-68 作者:  Zhao, Jinqiang[1];  Mei, Niansong[2];  Zhang, Zhaofeng[3];  Meng, Lingqin[4] 收藏  |  浏览/下载：5/0  |  提交时间：2019/04/24 analogue-digital conversion  switching circuits  V-aq-based trilevel switching scheme  SAR ADC  area-efficient trilevel switching scheme  successive approximation register  analogue-to-digital converter  least significant bit capacitor