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Resilience-Aware Frequency Tuning for Neural-Network-Based Approximate Computing Chips 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017, 卷号: 25, 期号: 10, 页码: 2736-2748
作者:  Wang, Ying;  Deng, Jiachao;  Fang, Yuntan;  Li, Huawei;  Li, Xiaowei
收藏  |  浏览/下载:27/0  |  提交时间:2019/12/12
Going Cooler With Timing-Constrained TeSHoP: A Temperature Sensing-Based Hotspot-Driven Placement Technique for FPGAs 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017, 卷号: 25, 期号: 9, 页码: 2525-2537
作者:  Lu, Weina;  Hu, Yu;  Ye, Jing;  Li, Xiaowei
收藏  |  浏览/下载:19/0  |  提交时间:2019/12/12
Development of the abcstar front-end chip for the atlas silicon strip upgrade 期刊论文
Journal of instrumentation, 2017, 卷号: 12, 页码: 10
作者:  Lu, W.;  Anghinolfi, F.;  Cheng, L.;  De Witt, J.;  Kaplon, J.
收藏  |  浏览/下载:44/0  |  提交时间:2019/04/23
Characterization of the column-based priority logic readout of topmetal-ii- cmos pixel direct charge sensor 期刊论文
Journal of instrumentation, 2017, 卷号: 12, 页码: 10
作者:  An, M.;  Zhang, W.;  Xiao, L.;  Gao, C.;  Chen, C.
收藏  |  浏览/下载:29/0  |  提交时间:2019/04/23
Identifying Single Event Transients Location based on Compressed Sensing 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017
作者:  Cuiping Shao;  Huiyun Li
收藏  |  浏览/下载:17/0  |  提交时间:2018/02/02
A low-power, low-latency, dual-channel serializer ASIC for detector front-end readout 期刊论文
JOURNAL OF INSTRUMENTATION, 2017, 卷号: 12, 页码: C01049
作者:  Xiao, L;  Gong, D;  Liu, T;  Chen, J;  Fan, Q
收藏  |  浏览/下载:9/0  |  提交时间:2019/08/27
Characterization of the column-based priority logic readout of Topmetal-II- CMOS pixel direct charge sensor 期刊论文
JOURNAL OF INSTRUMENTATION, 2017, 卷号: 12, 页码: C03004
作者:  An, M;  Zhang, W;  Xiao, L;  Gao, C;  Chen, C
收藏  |  浏览/下载:27/0  |  提交时间:2019/08/27
Development of the ABCStar front-end chip for the ATLAS silicon strip upgrade 期刊论文
JOURNAL OF INSTRUMENTATION, 2017, 卷号: 12, 页码: C04017
作者:  ATLAS ITk Strips Collaboration
收藏  |  浏览/下载:25/0  |  提交时间:2019/08/27
An Enhancement of Crosstalk Avoidance Code Based on Fibonacci Numeral System for Through Silicon Vias 期刊论文
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2017
Cui, Xiaole; Cui, Xiaoxin; Ni, Yewen; Miao, Min; Jin Yufeng
收藏  |  浏览/下载:7/0  |  提交时间:2017/12/03
HLDTL: High-performance, low-cost, and double node upset tolerant latch design 期刊论文
Proceedings of the IEEE VLSI Test Symposium, 2017
作者:  Liang,Huaguo;  Yi,Maoxiang;  Cui,Jie;  Yan,Aibin;  Huang,Zhengfeng
收藏  |  浏览/下载:12/0  |  提交时间:2019/04/22


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