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浏览/检索结果: 共5条，第1-5条 帮助 已选(0)清除 条数/页：5101520253035404550556065707580859095100   排序方式：请选择发表日期升序发表日期降序提交时间升序提交时间降序题名升序题名降序作者升序作者降序 Breaking the von Neumann bottleneck: architecture-level processing-in-memory technology 期刊论文 SCIENCE CHINA-INFORMATION SCIENCES, 2021, 卷号: 64, 期号: 6, 页码: 10 作者:  Zou, Xingqi;  Xu, Sheng;  Chen, Xiaoming;  Yan, Liang;  Han, Yinhe 收藏  |  浏览/下载：12/0  |  提交时间：2021/12/01 processing-in-memory (PIM)  von Neumann bottleneck  memory wall  PIM simulator  architecture-level PIM   Enabling Secure NVM-Based in-Memory Neural Network Computing by Sparse Fast Gradient Encryption 期刊论文 IEEE TRANSACTIONS ON COMPUTERS, 2020, 卷号: 69, 期号: 11, 页码: 1596-1610 作者:  Cai, Yi;  Chen, Xiaoming;  Tian, Lu;  Wang, Yu;  Yang, Huazhong 收藏  |  浏览/下载：32/0  |  提交时间：2020/12/10 Artificial neural networks  Nonvolatile memory  Encryption  Computational modeling  Hardware  Non-volatile memory (NVM)  compute-in-memory (CIM)  neural network  security  encryption   Spintronic Processing Unit in Spin Transfer Torque Magnetic Random Access Memory 期刊论文 IEEE TRANSACTIONS ON ELECTRON DEVICES, 2019, 卷号: 66, 页码: 2017-2022 作者:  Zhang, He;  Kang, Wang;  Cao, Kaihua;  Wu, Bi;  Zhang, Youguang 收藏  |  浏览/下载：28/0  |  提交时间：2019/12/30 Process-in-memory (PIM)  spin transfer toque magnetic random access memory (STT-MRAM)  spintronic processing unit (SPU)  von Neumann bottleneck   RRAM-based parallel computing architecture using k-nearest neighbor classification for pattern recognition 期刊论文 SCIENTIFIC REPORTS, 2017 Jiang, Yuning; Kang, Jinfeng; Wang, Xinan 收藏  |  浏览/下载：7/0  |  提交时间：2017/12/03 METAL-OXIDE RRAM  NEUROMORPHIC SYSTEMS  DEVICE  ALGORITHMS  MEMORY   Reconfigurable Nonvolatile Logic Operations in Resistance Switching Crossbar Array for Large-Scale Circuits 期刊论文 ADVANCED MATERIALS, 2016 Huang, Peng; Kang, Jinfeng; Zhao, Yudi; Chen, Sijie; Han, Runze; Zhou, Zheng; Chen, Zhe; Ma, Wenjia; Li, Mu; Liu, Lifeng; Liu, Xiaoyan 收藏  |  浏览/下载：3/0  |  提交时间：2017/12/04 memristors,nonvolatile logic,resistance switching,von Neumann bottleneck  RESISTIVE MEMORY  ARCHITECTURE  ELEMENT  NETWORK