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西安交通大学 [3]

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	A hybrid Sigma-Delta modulator with reusable SAR quantizer 期刊论文 IEICE ELECTRONICS EXPRESS, 2019, 卷号: 16 作者: Yin, Tao; Xin, Fubin; Li, Fanyang; Liu, Fei; Yang, Haigang 收藏 \| 浏览/下载：7/0 \| 提交时间：2019/11/21 energy-efficient successive approximation register CMOS ADC Sigma-Delta modulator
	A Fully Differential SAR/Single-Slope ADC for CMOS Imager Sensor 会议论文 2019 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC), 2019-01-01 作者: Liu, Ga; Yu, Ningmei; Zhang, Hejiu; He, Jian 收藏 \| 浏览/下载：13/0 \| 提交时间：2019/12/20 CMOS image sensor (CIS) successive approximation ADC single-slope (SS) ADC
	A Low-Power Pipelined-SAR ADC Using Boosted Bucket-Brigade Device for Residue Charge Processing 期刊论文 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2018, 卷号: 26, 页码: 1763-1776 作者: Zhang, Hong; Sun, Junqiang; Zhang, Jie; Zhang, Ruizhi; Carusone, Anthony Chan 收藏 \| 浏览/下载：5/0 \| 提交时间：2019/11/19 Boosted low power residue processing pipelined-successive approximation register (SAR) analogto-digital converter (ADC) bucket-brigade device (BBD)
	A High-Speed 2-bit/Cycle SAR ADC With Time-Domain Quantization 期刊论文 IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2018, 卷号: 26, 期号: 10, 页码: 2175-2179 作者: Qiu, Lei; Yang, Chuanshi; Wang, Keping*; Zheng, Yuanjin 收藏 \| 浏览/下载：11/0 \| 提交时间：2019/12/04 2 bit/cycle analog-to-digital converter (ADC) nonbinary successive approximation register (SAR) time-domain quantization
	Passive Noise Shaping in SAR ADC With Improved Efficiency 期刊论文 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2018, 卷号: 26, 页码: 416-420 作者: Song, Yan; Chan, Chi-Hang; Zhu, Yan; Geng, Li; Seng-Pan, U. 收藏 \| 浏览/下载：2/0 \| 提交时间：2019/11/26 successive approximation register (SAR) passive noise shaping (PNS) delta sampling oversampling Analog-to-digital converter (ADC)
	V-aq-based tri-level switching scheme for SAR ADC 期刊论文 ELECTRONICS LETTERS, 2018, 卷号: 54, 页码: 66-68 作者: Zhao, Jinqiang[1]; Mei, Niansong[2]; Zhang, Zhaofeng[3]; Meng, Lingqin[4] 收藏 \| 浏览/下载：5/0 \| 提交时间：2019/04/24 analogue-digital conversion switching circuits V-aq-based trilevel switching scheme SAR ADC area-efficient trilevel switching scheme successive approximation register analogue-to-digital converter least significant bit capacitor
	Low-power, high-speed dual modulus prescalers based on branch-merged true single-phase clocked scheme 期刊论文 electronics letters, 2015 Jia, Song; Yan, Shilin; Wang, Yuan; Zhang, Ganggang 收藏 \| 浏览/下载：4/0 \| 提交时间：2015/11/13 analogue-digital conversion digital-analogue conversion energy-efficient capacitor-splitting DAC scheme SAR ADC accuracy digital-to-analogue converter successive approximation register analogue-to-digital converter split-capacitive-array DAC structure energy-efficient-up transition switching energy reduction area reduction third-reference voltage least significant bit FREQUENCY-DIVIDER
	A 0.6-V 8.3-ENOB asynchronous SAR ADC for biomedical applications 期刊论文 Journal of Semiconductors, 2014, 卷号: 35, 期号: [db:dc_citation_issue] 作者: Yan, Song; Zhongming, Xue; Pengcheng, Yan; Jueying, Zhang; Li, Geng 收藏 \| 浏览/下载：1/0 \| 提交时间：2019/12/03 Biomedical applications Biomedical systems Least significant bits Low Power Low voltages Low-power consumption SAR ADC Successive approximation register analogto-digital converters (ADC)
	A cryogenic SAR ADC for infrared readout circuits 期刊论文半导体学报, 2011, 卷号: 第11期, 页码: P152-156 作者: Zhao Hongliang * Zhao Yiqiang Zhang Zhisheng 收藏 \| 浏览/下载：1/0 \| 提交时间：2019/11/26 cryogenic ADC/low power/successive approximation register/temperature-compensated time-based comparator
	Low-power successive approximation ADC design using switched-opamp 期刊论文 2010, 2010 Qiao Junshi; Li Dongmei 收藏 \| 浏览/下载：3/0

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