Temperature- and voltage-dependent trap generation model in high-k metal gate MOS device with percolation simulation
Xu H(徐昊); Yang H(杨红); Wang YR(王艳蓉); Luo WC(罗维春); Qi LW(祁路伟); Li JF(李俊峰); Zhao C(赵超); Chen DP(陈大鹏); Ye TC(叶甜春)
刊名Chinese Physics B
2016-06-25
文献子类期刊论文
英文摘要

High-k metal gate stacks are being used to suppress the gate leakage due to tunneling for sub-45 nm technology nodes.The reliability of thin dielectric films becomes a limitation to device manufacturing,especially to the breakdown characteristic.In this work,a breakdown simulator based on a percolation model and the kinetic Monte Carlo method is set up,and the intrinsic relation between time to breakdown and trap generation rate R is studied by TDDB simulation.

内容类型期刊论文
源URL[http://159.226.55.106/handle/172511/16221]  
专题微电子研究所_集成电路先导工艺研发中心
作者单位中国科学院微电子研究所
推荐引用方式
GB/T 7714
Xu H,Yang H,Wang YR,et al. Temperature- and voltage-dependent trap generation model in high-k metal gate MOS device with percolation simulation[J]. Chinese Physics B,2016.
APA Xu H.,Yang H.,Wang YR.,Luo WC.,Qi LW.,...&Ye TC.(2016).Temperature- and voltage-dependent trap generation model in high-k metal gate MOS device with percolation simulation.Chinese Physics B.
MLA Xu H,et al."Temperature- and voltage-dependent trap generation model in high-k metal gate MOS device with percolation simulation".Chinese Physics B (2016).
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