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Configuration and adjustment of substrate preheating device 会议论文
2011 International Conference on Materials Engineering for Advanced Technologies, ICMEAT 2011, Singapore, May 5-6, 2011
作者:  Zhang K(张凯);  Long RS(龙日升);  Liu WJ(刘伟军)
收藏  |  浏览/下载:14/0  |  提交时间:2017/03/13
A DSP based data acquisition for MIMU 会议论文
ISTM/2005: 6th International Symposium on Test and Measurement, Vols 1-9, Conference Proceedings, 6th International Symposium on Test and Measurement (ISTM), Dalian, PEOPLES R CHINA, Web of Science
Cheng, L; Zhou, ZY; Xiong, SS; Ji, F
收藏  |  浏览/下载:2/0
The way of project management in state-owned investment company 会议论文
Proceedings of 20th IPMA World Congress on Project Management, Vols 1 and 2, 20th IPMA World Congress on Project Management, Shanghai, PEOPLES R CHINA, Web of Science
Liu Zheng
收藏  |  浏览/下载:3/0  |  提交时间:2017/06/15
Storage and compression design of high speed CCD (EI CONFERENCE) 会议论文
4th International Symposium on Advanced Optical Manufacturing and Testing Technologies: Optical Test and Measurement Technology and Equipment, November 19, 2008 - November 21, 2008, Chengdu, China
Cai X.; Zhai L. P.
收藏  |  浏览/下载:45/0  |  提交时间:2013/03/25
In current field of CCD measurement  large area and high resolution CCD is used to obtain big measurement image  so that  speed and capacity of CCD requires high performance of later storage and process system. The paper discusses how to use SCSI hard disk to construct storage system and use DSPs and FPGA to realize image compression. As for storage subsystem  Because CCD is divided into multiplex output  SCSI array is used in RAID0 way. The storage system is composed of high speed buffer  DMA controller  control MCU  SCSI protocol controller and SCSI hard disk. As for compression subsystem  according to requirement of communication and monitor system  the output is fixed resolution image and analog PAL signal. The compression means is JPEG2000 standard  in which  9/7 wavelets in lifting format is used. 2 DSPs and FPGA are used to compose parallel compression system. The system is composed of FPGA pre-processing module  DSP compression module  video decoder module  data buffer module and communication module. Firstly  discrete wavelet transform and quantization is realized in FPGA. Secondly  entropy coding and stream adaption is realized in DSPs. Last  analog PAL signal is output by Video decoder. Data buffer is realized in synchronous dual-port RAM and state of subsystem is transfer to controller. Through subjective and objective evaluation  the storage and compression system satisfies the requirement of system. 2009 SPIE.  


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