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计算技术研究所 [7]
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期刊论文 [9]
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Block Convolution: Toward Memory-Efficient Inference of Large-Scale CNNs on FPGA
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 5, 页码: 1436-1447
作者:
Li, Gang
;
Liu, Zejian
;
Li, Fanrong
;
Cheng, Jian
收藏
  |  
浏览/下载:24/0
  |  
提交时间:2022/06/10
Convolution
Field programmable gate arrays
System-on-chip
Task analysis
Random access memory
Tensors
Memory management
Block convolution
convolutional neural network (CNN) accelerator
field-programmable gate array (FPGA)
memory efficient
off-chip transfer
Practical Attacks on Deep Neural Networks by Memory Trojaning
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2021, 卷号: 40, 期号: 6, 页码: 1230-1243
作者:
Hu, Xing
;
Zhao, Yang
;
Deng, Lei
;
Liang, Ling
;
Zuo, Pengfei
收藏
  |  
浏览/下载:21/0
  |  
提交时间:2021/12/01
Trojan horses
Hardware
Integrated circuit modeling
Computational modeling
Security
Payloads
Convolutional neural networks (CNNs)
deep learning accelerator
deep learning attack
hardware Trojan
Microcombs for ultrahigh bandwidth optical data transmission and neural networks
会议论文
Virtual, Online, Czech republic, 2021-04-19
作者:
Tan, M.
;
Xu, X.
;
Corcoran, B.
;
Wu, J.
;
Boes, A.
收藏
  |  
浏览/下载:29/0
  |  
提交时间:2021/07/20
Optical neural networks
neuromorphic processor
microcomb
convolutional accelerator
data transmission
Photonic convolutional accelerator and neural network in the Tera-OPs regime based on Kerr microcombs
会议论文
Virtual, Online, United states, 2021-03-06
作者:
Xu, Xingyuan
;
Tan, Mengxi
;
Corcoran, Bill
;
Wu, Jiayang
;
Boes, Andreas
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  |  
浏览/下载:25/0
  |  
提交时间:2021/06/01
Optical neural networks
neuromorphic processor
microcomb
convolutional accelerator
Hardware Acceleration for GCNs via Bidirectional Fusion
期刊论文
IEEE COMPUTER ARCHITECTURE LETTERS, 2021, 卷号: 20, 期号: 1, 页码: 4
作者:
Li, Han
;
Yan, Mingyu
;
Yang, Xiaocheng
;
Deng, Lei
;
Li, Wenming
收藏
  |  
浏览/下载:20/0
  |  
提交时间:2021/12/01
Random access memory
Computational modeling
Analytical models
Hardware
Engines
Computer architecture
Transforms
Graph convolutional neural networks
hardware accelerator
bidirectional execution
inter-phase fusion
Swallow: A Versatile Accelerator for Sparse Neural Networks
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 12, 页码: 4881-4893
作者:
Liu, Bosheng
;
Chen, Xiaoming
;
Han, Yinhe
;
Xu, Haobo
收藏
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浏览/下载:14/0
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提交时间:2021/12/01
Accelerator
convolutional (Conv) layers
fully connected (FC) layers
sparse neural networks (SNNs)
FSA: A Fine-Grained Systolic Accelerator for Sparse CNNs
期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 11, 页码: 3589-3600
作者:
Li, Fanrong
;
Li, Gang
;
Mo, Zitao
;
He, Xiangyu
;
Cheng, Jian
收藏
  |  
浏览/下载:26/0
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提交时间:2021/01/06
Accelerator
architecture
convolutional neural networks (CNNs)
sparsity
SqueezeFlow: A Sparse CNN Accelerator Exploiting Concise Convolution Rules
期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2019, 卷号: 68, 期号: 11, 页码: 1663-1677
作者:
Li, Jiajun
;
Jiang, Shuhao
;
Gong, Shijun
;
Wu, Jingya
;
Yan, Junchao
收藏
  |  
浏览/下载:13/0
  |  
提交时间:2020/12/10
Convolutional neural networks
accelerator architecture
hardware acceleration
Promoting the Harmony between Sparsity and Regularity: A Relaxed Synchronous Architecture for Convolutional Neural Networks
期刊论文
IEEE TRANSACTIONS ON COMPUTERS, 2019, 卷号: 68, 期号: 6, 页码: 867-881
作者:
Wu, Jingya
;
Lu, Wenyan
;
Yan, Guihai
;
Li, Jiajun
;
Gong, Shijun
收藏
  |  
浏览/下载:58/0
  |  
提交时间:2019/08/16
Convolutional neural networks
accelerator
architecture
parallelism
sparsity
SynergyFlow: An Elastic Accelerator Architecture Supporting Batch Processing of Large-Scale Deep Neural Networks
期刊论文
ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 2019, 卷号: 24, 期号: 1, 页码: 27
作者:
Jiang, Shuhao
;
Wu, Jingya
;
Li, Xiaowei
;
Li, Jiajun
;
Yan, Guihai
收藏
  |  
浏览/下载:56/0
  |  
提交时间:2019/04/03
Deep neural networks
convolutional neural networks
accelerator
architecture
resource utilization
complementary effect
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