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| A system-level mixed DFT-TAM structure for SoC design 会议论文
2005 Conference on High Density Microsystem Design and Packaging and Component Failure Analysis, HDP'05, 2005-06-27
作者: Zhang, Jinyi[1]; Chen, Wenwei[2]; Run, Xiaojun[3]; Li, Jiao[4]
  收藏 | 浏览/下载：1/0 | 提交时间：2019/05/10 |
| A system-level mixed DFT-TAM structure for SoC design 会议论文
Proceedings of the Seventh IEEE CPMT Conference on High Density Microsystem Design, Packaging and Failure Analysis (HDP'05)
作者: Zhang Jinyi[1]; Chen Wenwei[2]; Run xiaojun[3]; Li Jiao[4]
收藏 | 浏览/下载：2/0 | 提交时间：2019/05/10
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| A system-level mixed DFT-TAM structure for SoC design 会议论文
Proceedings of the Seventh IEEE CPMT Conference on High Density Microsystem Design, Packaging and Failure Analysis (HDP'05)
作者: Zhang Jinyi[1]; Chen Wenwei[2]; Run xiaojun[3]; Li Jiao[4]
收藏 | 浏览/下载：2/0 | 提交时间：2019/05/10
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| A system-level mixed DFT-TAM structure for SoC design 会议论文
Proceedings of the Seventh IEEE CPMT Conference on High Density Microsystem Design, Packaging and Failure Analysis (HDP'05)
作者: Zhang Jinyi[1]; Chen Wenwei[2]; Run xiaojun[3]; Li Jiao[4]
收藏 | 浏览/下载：2/0 | 提交时间：2019/05/10
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| A system-level mixed DFT-TAM structure for SoC design 会议论文
Proceedings of the Seventh IEEE CPMT Conference on High Density Microsystem Design, Packaging and Failure Analysis (HDP'05)
作者: Zhang Jinyi[1]; Chen Wenwei[2]; Run xiaojun[3]; Li Jiao[4]
收藏 | 浏览/下载：4/0 | 提交时间：2019/05/10
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