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浏览/检索结果: 共11条，第1-10条 帮助 限定条件 内容类型：期刊论文     已选(0)清除 条数/页：5101520253035404550556065707580859095100   排序方式：请选择作者升序作者降序题名升序题名降序发表日期升序发表日期降序提交时间升序提交时间降序 Block Convolution: Toward Memory-Efficient Inference of Large-Scale CNNs on FPGA 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 5, 页码: 1436-1447 作者:  Li, Gang;  Liu, Zejian;  Li, Fanrong;  Cheng, Jian 收藏  |  浏览/下载：24/0  |  提交时间：2022/06/10 Convolution  Field programmable gate arrays  System-on-chip  Task analysis  Random access memory  Tensors  Memory management  Block convolution  convolutional neural network (CNN) accelerator  field-programmable gate array (FPGA)  memory efficient  off-chip transfer   Deep-Sea: A Reconfigurable Accelerator for Classic CNN 期刊论文 WIRELESS COMMUNICATIONS & MOBILE COMPUTING, 2022, 卷号: 2022, 页码: 23 作者:  Xiong, Hao;  Sun, Kelin;  Zhang, Bing;  Yang, Jingchuan;  Xu, Huiping 收藏  |  浏览/下载：0/0  |  提交时间：2022/05/20 Block Convolution: Towards Memory-Efficient Inference of Large-Scale CNNs on FPGA 期刊论文 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2021, 期号: 2021.5, 页码: 1-1 作者:  Li, Gang;  Liu, Zejian;  Li, Fanrong;  Cheng, Jian 收藏  |  浏览/下载：35/0  |  提交时间：2022/02/15 block convolution  memory-efficient  off-chip transfer  fpga  cnn accelerator   An Edge 3D CNN Accelerator for Low-Power Activity Recognition 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2021, 卷号: 40, 期号: 5, 页码: 918-930 作者:  Wang, Ying;  Wang, Yongchen;  Shi, Cong;  Cheng, Long;  Li, Huawei 收藏  |  浏览/下载：22/0  |  提交时间：2021/12/01 Three-dimensional displays  Two dimensional displays  Arrays  Feature extraction  System-on-chip  Redundancy  3D CNN  activity analysis  CNN accelerator  network-on-chip  video   FSA: A Fine-Grained Systolic Accelerator for Sparse CNNs 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 11, 页码: 3589-3600 作者:  Li, Fanrong;  Li, Gang;  Mo, Zitao;  He, Xiangyu;  Cheng, Jian 收藏  |  浏览/下载：28/0  |  提交时间：2021/01/06 Accelerator  architecture  convolutional neural networks (CNNs)  sparsity   DNNTune: Automatic Benchmarking DNN Models for Mobile-cloud Computing 期刊论文 ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, 2019, 卷号: 16, 期号: 4, 页码: 26 作者:  Xia, Chunwei;  Zhao, Jiacheng;  Cui, Huimin;  Feng, Xiaobing;  Xue, Jingling 收藏  |  浏览/下载：2/0  |  提交时间：2020/12/10 DNN  mobile-cloud computing  heterogeneous computing   SqueezeFlow: A Sparse CNN Accelerator Exploiting Concise Convolution Rules 期刊论文 IEEE TRANSACTIONS ON COMPUTERS, 2019, 卷号: 68, 期号: 11, 页码: 1663-1677 作者:  Li, Jiajun;  Jiang, Shuhao;  Gong, Shijun;  Wu, Jingya;  Yan, Junchao 收藏  |  浏览/下载：14/0  |  提交时间：2020/12/10 Convolutional neural networks  accelerator architecture  hardware acceleration   A QoS-QoR Aware CNN Accelerator Design Approach 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2019, 卷号: 38, 期号: 11, 页码: 1995-2007 作者:  Wang, Ying;  Li, Huawei;  Cheng, Long;  Li, Xiaowei 收藏  |  浏览/下载：12/0  |  提交时间：2020/12/10 Approximate computing  convolutional neural network (CNN)  deep learning (DL)  quality of service (QoS)  real-time   Promoting the Harmony between Sparsity and Regularity: A Relaxed Synchronous Architecture for Convolutional Neural Networks 期刊论文 IEEE TRANSACTIONS ON COMPUTERS, 2019, 卷号: 68, 期号: 6, 页码: 867-881 作者:  Wu, Jingya;  Lu, Wenyan;  Yan, Guihai;  Li, Jiajun;  Gong, Shijun 收藏  |  浏览/下载：58/0  |  提交时间：2019/08/16 Convolutional neural networks  accelerator  architecture  parallelism  sparsity   A High-Efficiency FPGA-Based Accelerator for Binarized Neural Network 期刊论文 Journal of Circuits, Systems, and Computers, 2019, 卷号: 28, 期号: 1, 页码: 1 作者:  Guo Peng;  Ma Hong;  Ruizhi Chen;  Donglin Wang 收藏  |  浏览/下载：64/0  |  提交时间：2019/06/17 Cnn  Bnn  Fpga  Accelerator