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	Design and Implementation of a 1024-point High-speed FFT Processor Based on the FPGA
	Zhou, Sheng; Wang, Xiaochun; Ji, Jianjun; Wang, Yanqun
	2013
会议名称	6th International Congress on Image and Signal Processing (CISP)
会议地点	Hangzhou, PEOPLES R CHINA
关键词	field programmable gate array 1024-point FFT Butterfly Ping-pong operation Verilog HDL
页码	1112-1116
收录类别	CPCI-S
会议录	2013 6TH INTERNATIONAL CONGRESS ON IMAGE AND SIGNA
URL标识	查看原文
内容类型	会议论文
URI标识	http://www.corc.org.cn/handle/1471x/6687660
专题	中国医学科学院 北京协和医学院
推荐引用方式 GB/T 7714	Zhou, Sheng,Wang, Xiaochun,Ji, Jianjun,et al. Design and Implementation of a 1024-point High-speed FFT Processor Based on the FPGA[C]. 见:6th International Congress on Image and Signal Processing (CISP). Hangzhou, PEOPLES R CHINA.

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