A 5.6-mW Power Dissipation CMOS Frequency Synthesizer for L1/L2 Dual-Band GPS Application

CORC > 半导体研究所 > 中国科学院半导体研究所 > 中国科学院半导体研究所（2009年前）

	A 5.6-mW Power Dissipation CMOS Frequency Synthesizer for L1/L2 Dual-Band GPS Application
	Jia HL ; Ren T ; Lin M ; Chen FX ; Shi Y ; Dai FF
	2008
会议名称	9th international conference on solid-state and integrated-circuit technology
会议日期	oct 20-23, 2008
会议地点	beijing, peoples r china
关键词	PLL
页码	vols 1-4: 1629-1632
通讯作者	jia, hl, chinese acad sci, inst semicond, beijing 100083, peoples r china.
中文摘要	this paper presents a wide tuning range cmos frequency synthesizer for dual-band gps receiver, which has been fabricated in a standard 0.18-um rf cmos process. with a high q on-chip inductor, the wide-band vco shows a tuning range from 2 to 3.6ghz to cover 2.45ghz and 3.14ghz in case of process corner or temperature variation, with a current consumption varying accordingly from 0.8ma to 0.4ma, from a 1.8v supply voltage. the measurement results show that the whole frequency synthesizer costs a very low power consumption of 5.6mw working at l i band with in-band phase noise less than -82dbc/hz and out-of-band phase noise about -112 dbc/hz at 1mhz offset from a 3.142ghz carrier.
英文摘要	this paper presents a wide tuning range cmos frequency synthesizer for dual-band gps receiver, which has been fabricated in a standard 0.18-um rf cmos process. with a high q on-chip inductor, the wide-band vco shows a tuning range from 2 to 3.6ghz to cover 2.45ghz and 3.14ghz in case of process corner or temperature variation, with a current consumption varying accordingly from 0.8ma to 0.4ma, from a 1.8v supply voltage. the measurement results show that the whole frequency synthesizer costs a very low power consumption of 5.6mw working at l i band with in-band phase noise less than -82dbc/hz and out-of-band phase noise about -112 dbc/hz at 1mhz offset from a 3.142ghz carrier.; zhangdi于2010-03-09批量导入; zhangdi于2010-03-09批量导入; ieee beijing sect.; chinese inst elect.; ieee electron devices soc.; ieee eds beijing chapter.; ieee solid state circuits soc.; ieee circuites & syst soc.; ieee hong kong eds, sscs chapter.; ieee sscs beijing chapter.; japan soc appl phys.; elect div ieee.; ursi commiss d.; inst elect engineers korea.; assoc asia pacific phys soc.; peking univ, ieee eds student chapter.; [jia, hailong; ren, tong; lin, min; chen, fangxiong; shi, yin] chinese acad sci, inst semicond, beijing 100083, peoples r china
收录类别	其他
会议主办者	ieee beijing sect.; chinese inst elect.; ieee electron devices soc.; ieee eds beijing chapter.; ieee solid state circuits soc.; ieee circuites & syst soc.; ieee hong kong eds, sscs chapter.; ieee sscs beijing chapter.; japan soc appl phys.; elect div ieee.; ursi commiss d.; inst elect engineers korea.; assoc asia pacific phys soc.; peking univ, ieee eds student chapter.
会议录	2008 9th international conference on solid-state and integrated-circuit technology
会议录出版者	ieee ; 345 e 47th st, new york, ny 10017 usa
会议录出版地	345 e 47th st, new york, ny 10017 usa
学科主题	微电子学
语种	英语
ISBN号	978-1-4244-2185-5
内容类型	会议论文
源URL	[http://ir.semi.ac.cn/handle/172111/8290]
专题	半导体研究所_中国科学院半导体研究所（2009年前）
推荐引用方式 GB/T 7714	Jia HL,Ren T,Lin M,et al. A 5.6-mW Power Dissipation CMOS Frequency Synthesizer for L1/L2 Dual-Band GPS Application[C]. 见:9th international conference on solid-state and integrated-circuit technology. beijing, peoples r china. oct 20-23, 2008.