With the rapid development of space science and technology, more and more semiconductor devices and ICs will be worked in complicated and and harsh space radiation environment. The circuit functions will be degraded in some degree because of the ionizing radiation effects existing in the space environment, bringing a series of reliability problems to astronautical and aeronautical system applications. This makes the study of radiation effects and the underlying damage mechanisms to become a hot topic of home and abroad gradually in recent years in the field of microelectronics. Because of its high frequency, low resistance, low noise and good linearity, analog circuits are widely used in space system circuits. However, the exists of ELDRS in analog ICs is a serious threaten to the stability and reliability of spacecraft electronic systems, greatly reducing the operating life, and thus subject to widespread concern in the aerospace and semiconductor manufacturing industries. In recent years, researchers took great effects to investigate the ELDRS, have gotten some good results and established several models about ELDRS. But due to the structures and the manufacture processes of bipolar transistors are different from the MOSFETs, and confined by the quantitative separation of radiation induced Not and Nit, the obtained mechanism models can only qualitatively describe the changes in the macroscopic parameters of the devices, but how the Not and Nit produced and the relationship between defects and characteristic degradation is still unknown. Use the Silvaco process and device simulation, we successfully manufactured the GCLPNP BJTs, GCLNPN BJTs, GCVNPN BJTS and Gated Diodes with different process parameters for the first time in our country. We also analyzed the band conditions under various gate biases, obtained the device normal and gated characteristics, established two techniques ( the Subthreshold-Current technique and the gate sweep technique ) to separate the radiation induced Not and Nit quantitatively, then studied the radiation effects and underlying mechanisms during high/low dose radiation and annealing process. Quantitative charge separation is carried out not only on the gated PNP BJTs, but also on gated NPN NJTs and gated diodes. Base on the radiation induced charge separation of different test structures and the space charge model, we validated the competition model and developed the physical mechanisms of ELDRS. At last the dose rate response and the gate bias effects on the irradiated bipolar transistors are studied; the base current broadening mechanisms are also invented. A new analysis method and testing technique is proposed in order to study the ELSRS of bipolar devices through the implementation of the project, it not only supported a theoretical basis to improve the space-charge model and develop of competition model, but also provided a methodological guidance for the design and manufacture of domestic radiation hardening devices.