An Analytical Framework for Estimating Scale-Out and Scale-Up Power Efficiency of Heterogeneous Manycores

doi:10.1109/TC.2015.2419655

CORC > 计算技术研究所 > 中国科学院计算技术研究所 > 中国科学院计算技术研究所期刊论文 > 英文

	An Analytical Framework for Estimating Scale-Out and Scale-Up Power Efficiency of Heterogeneous Manycores
	Ma, Jun 1,2; Yan, Guihai 1,2; Han, Yinhe 1,2; Li, Xiaowei 1,2
刊名	IEEE TRANSACTIONS ON COMPUTERS
	2016-02-01
卷号	65 期号:2 页码:367-381
关键词	Heterogeneous manycores scale-out scale-up analytical model power efficiency runtime management
ISSN号	0018-9340
DOI	10.1109/TC.2015.2419655
英文摘要	Heterogeneous manycore architectures have shown to be highly promising to boost power efficiency through two independent ways: 1) enabling massive thread-level parallelism, called "scale-out" approach, and 2) enabling thread migration between heterogeneous cores, called "scale-up" approach. How to accurately model the profitability of power efficiency of the two ways, particularly in an analytical and computational-effective manner, is essential to reap the power efficiency of such architectures. We propose a comprehensive analytical model to predict the power efficiency from the two independent ways. Given power efficiency is measured by performance per watt, this model is composed of a performance and a power model. The performance model is built by two orthogonal functions alpha and beta. Function alpha describes the scale-out speedup from multithreading; function beta presents the scale-up speedup from core heterogeneity. Thus, the performance model can clearly capture the overall speedup of any multithreading and thread-to-core mapping strategies. The power model predicts the power of corresponding scale-out and scale-up configurations. It simultaneously captures the power variations caused by thread synchronization and thread migration between heterogeneous cores. We build both performance and power model in an analytical way and keep the computational complexity in mind. This merit leads to a suit of comprehensive and low-complexity models for runtime management. These models are validated on large-scale heterogeneous manycore architecture with full-system simulations. For performance prediction, the average error is below 12 percent, lower than that of the state-of-the-art methods. For power prediction, the average error is 7.74 percent. On top of the models, we introduce two heuristic scheduling algorithms, performance-oriented MAX-P and power efficiency-oriented MAX-E, to demonstrate the usage of these models. The results show that MAX-P outperforms the state-of-the-art methods by 18 percent in performance averagely; MAX-E outperforms the baseline by 70 percent in power efficiency on average.
资助项目	National Basic Research Program of China (973)[2011CB302503] ; National Natural Science Foundation of China[61100016] ; National Natural Science Foundation of China[61376043] ; National Natural Science Foundation of China[61221062]
WOS研究方向	Computer Science ; Engineering
语种	英语
出版者	IEEE COMPUTER SOC
WOS记录号	WOS:000372753500003
内容类型	期刊论文
源URL	[http://119.78.100.204/handle/2XEOYT63/8447]
专题	中国科学院计算技术研究所期刊论文_英文
通讯作者	Ma, Jun; Yan, Guihai; Han, Yinhe; Li, Xiaowei
作者单位	1.Chinese Acad Sci, Inst Comp Technol, State Key Lab Comp Architecture, Beijing 100190, Peoples R China 2.Univ Chinese Acad Sci, Beijing 100190, Peoples R China
推荐引用方式 GB/T 7714	Ma, Jun,Yan, Guihai,Han, Yinhe,et al. An Analytical Framework for Estimating Scale-Out and Scale-Up Power Efficiency of Heterogeneous Manycores[J]. IEEE TRANSACTIONS ON COMPUTERS,2016,65(2):367-381.
APA	Ma, Jun,Yan, Guihai,Han, Yinhe,&Li, Xiaowei.(2016).An Analytical Framework for Estimating Scale-Out and Scale-Up Power Efficiency of Heterogeneous Manycores.IEEE TRANSACTIONS ON COMPUTERS,65(2),367-381.
MLA	Ma, Jun,et al."An Analytical Framework for Estimating Scale-Out and Scale-Up Power Efficiency of Heterogeneous Manycores".IEEE TRANSACTIONS ON COMPUTERS 65.2(2016):367-381.