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	A Robust Energy/Area-Efficient Forwarded-Clock Receiver With All-Digital Clock and Data Recovery in 28-nm CMOS for High-Density Interconnects
	Chen, Shuai; Li, Hao; Chiang, Patrick Yin
刊名	IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
	2016
卷号	24期号:2
关键词	All-digital clock and data recovery (ADCDR) delay-locked loop (DLL) forwarded-clock (FC) receiver high-density interconnect jitter tolerance multicore processor process variation voltage and temperature drift
ISSN号	1063-8210
URL标识	查看原文
语种	英语
内容类型	期刊论文
URI标识	http://www.corc.org.cn/handle/1471x/4641983
专题	复旦大学上海医学院
推荐引用方式 GB/T 7714	Chen, Shuai,Li, Hao,Chiang, Patrick Yin. A Robust Energy/Area-Efficient Forwarded-Clock Receiver With All-Digital Clock and Data Recovery in 28-nm CMOS for High-Density Interconnects[J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS,2016,24(2).
APA	Chen, Shuai,Li, Hao,&Chiang, Patrick Yin.(2016).A Robust Energy/Area-Efficient Forwarded-Clock Receiver With All-Digital Clock and Data Recovery in 28-nm CMOS for High-Density Interconnects.IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS,24(2).
MLA	Chen, Shuai,et al."A Robust Energy/Area-Efficient Forwarded-Clock Receiver With All-Digital Clock and Data Recovery in 28-nm CMOS for High-Density Interconnects".IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 24.2(2016).

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