Integration Issue of Tensile SiN Liner for Dual Stress Liner(DSL) in Gate-Last High-k/Metal Gate(HKMG) Process Flow
Wang GL(王桂磊); Yin HZ(尹海洲); Qin ZL(秦长亮)
刊名ECS Trans.
2013-03-18
英文摘要In this paper, a process challenge of integrating Dual Stress Liner (DSL) (1)-(2) into gate-last High-k/Metal Gate (HKMG) flow is explained and a solution is presented. DSL is an effective method to enhance carriers’ mobility for short channel devices. But when it is applied to gate-last HKMG flow, the dummy gate oxide removal step (wet etch by DHF solution) would result in significant etch of tensile SiN liner. Because tensile SiN liner is formed on gate spacers and is exposed after Poly-Open-Polish (POP) CMP, recesses at the sides of the gate stacks would be formed during dummy gate oxide etch. In order to solve this problem, tensile SiN liner is treated in N2 plasma to reduce it’s etch rate in DHF solution. As a result, no recess appears at the side of gate stacks in our devices during the dummy gate oxide removal step.
公开日期2014-10-30
内容类型期刊论文
源URL[http://10.10.10.126/handle/311049/12034]  
专题微电子研究所_集成电路先导工艺研发中心
通讯作者Yin HZ(尹海洲)
推荐引用方式
GB/T 7714
Wang GL,Yin HZ,Qin ZL. Integration Issue of Tensile SiN Liner for Dual Stress Liner(DSL) in Gate-Last High-k/Metal Gate(HKMG) Process Flow[J]. ECS Trans.,2013.
APA 王桂磊,尹海洲,&秦长亮.(2013).Integration Issue of Tensile SiN Liner for Dual Stress Liner(DSL) in Gate-Last High-k/Metal Gate(HKMG) Process Flow.ECS Trans..
MLA 王桂磊,et al."Integration Issue of Tensile SiN Liner for Dual Stress Liner(DSL) in Gate-Last High-k/Metal Gate(HKMG) Process Flow".ECS Trans. (2013).
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