Joint Design of Training and Hardware Towards Efficient and Accuracy-Scalable Neural Network Inference

doi:10.1109/JETCAS.2018.2845396

CORC > 计算技术研究所 > 中国科学院计算技术研究所 > 中国科学院计算技术研究所期刊论文 > 英文

	Joint Design of Training and Hardware Towards Efficient and Accuracy-Scalable Neural Network Inference
	Lu, Wenyan 2,3; He, Xin 4; Yan, Guihai 1; Zhang, Xuan 4
刊名	IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS
	2018-12-01
卷号	8 期号:4 页码:810-821
关键词	Approximate computing neural network accelerator hardware-oriented training sensitivity analysis energy efficient architecture near threshold voltage approximate multiplier
ISSN号	2156-3357
DOI	10.1109/JETCAS.2018.2845396
英文摘要	The intrinsic error tolerance of neural network (NN) presents opportunities for approximate computing techniques to improve the energy efficiency of NN inference. Conventional approximate computing focuses on exploiting the efficiency-accuracy trade-off in existing pre-trained networks, which can lead to suboptimal solutions. In this paper, we first present AxTrain, a hardware-oriented training framework to facilitate approximate computing for NN inference. Specifically, AxTrain leverages the synergy between two orthogonal methods-one actively searches for a network parameters distribution with high error tolerance, and the other passively learns resilient weights by numerically incorporating the noise distributions of the approximate hardware in the forward pass during the training phase. Then, we incorporate AxTrain framework in an accuracy-scalable NN accelerator designed for high energy efficiency. Experimental results from various data sets with different approximation strategies demonstrate AxTrain's ability to obtain resilient neural network parameters for approximate computing and to improve system energy efficiency. And with AxTrain-guided NN models our proposed accuracy-scalable NN accelerator could achieve significantly higher energy efficiency with limited accuracy degradation under joint approximation techniques.
资助项目	Natural Science Foundation Award[1657562] ; National Natural Science Foundation of China[61572470]
WOS研究方向	Engineering
语种	英语
出版者	IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
WOS记录号	WOS:000454224200012
内容类型	期刊论文
源URL	[http://119.78.100.204/handle/2XEOYT63/3498]
专题	中国科学院计算技术研究所期刊论文_英文
通讯作者	He, Xin
作者单位	1.Chinese Acad Sci, Inst Comp Technol, Key Lab Comp Architecture, Beijing 100190, Peoples R China 2.Univ Chinese Acad Sci, Sch Comp & Control Engineer, Beijing 100190, Peoples R China 3.Chinese Acad Sci, State Key Lab Comp Architecture, Inst Comp Technol, Beijing 100190, Peoples R China 4.Washington Univ St Louis, Dept Elect & Syst Engn, St Louis, MO 63130 USA
推荐引用方式 GB/T 7714	Lu, Wenyan,He, Xin,Yan, Guihai,et al. Joint Design of Training and Hardware Towards Efficient and Accuracy-Scalable Neural Network Inference[J]. IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS,2018,8(4):810-821.
APA	Lu, Wenyan,He, Xin,Yan, Guihai,&Zhang, Xuan.(2018).Joint Design of Training and Hardware Towards Efficient and Accuracy-Scalable Neural Network Inference.IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS,8(4),810-821.
MLA	Lu, Wenyan,et al."Joint Design of Training and Hardware Towards Efficient and Accuracy-Scalable Neural Network Inference".IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS 8.4(2018):810-821.