Realization of 6-tap finite impulse response interpolation filter for H.264/AVC encoder | |
Wang, Qingchun ; Cao, Xixin ; Lu, Weijun ; He, Xiaoyan ; Cao, Jian | |
刊名 | 北京大学学报 自然科学版
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2007 | |
英文摘要 | It is proposed that four hardware architectures of 6-tap finite impulse response interpolation filter for the design of H.264/AVC encoder (SOC). Moreover, based on comparative analysis of Synopsys design compiler to implement the hardware at the same constraint, an efficient half pixel interpolation filter (6-tap FIR) architecture had been given finally.; EI; 0; 3; 417-420; 43 |
语种 | 英语 |
内容类型 | 期刊论文 |
源URL | [http://ir.pku.edu.cn/handle/20.500.11897/409962] ![]() |
专题 | 软件与微电子学院 |
推荐引用方式 GB/T 7714 | Wang, Qingchun,Cao, Xixin,Lu, Weijun,et al. Realization of 6-tap finite impulse response interpolation filter for H.264/AVC encoder[J]. 北京大学学报 自然科学版,2007. |
APA | Wang, Qingchun,Cao, Xixin,Lu, Weijun,He, Xiaoyan,&Cao, Jian.(2007).Realization of 6-tap finite impulse response interpolation filter for H.264/AVC encoder.北京大学学报 自然科学版. |
MLA | Wang, Qingchun,et al."Realization of 6-tap finite impulse response interpolation filter for H.264/AVC encoder".北京大学学报 自然科学版 (2007). |
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