Highly Configurable Floating-Point FFT IP Core with Reusing Method

CORC > 北京大学 > 信息科学技术学院

	Highly Configurable Floating-Point FFT IP Core with Reusing Method
	LIU Sanjun ; SUN Linjiao ; LI Shaowu ; YI Jinqiao ; MIAO Yuzhuang
刊名	Wuhan University Journal of Natural Sciences
	2013
关键词	fast Fourier transform (FFT) IP core embedded system in-place SOPC
英文摘要	A highly configurable fast Fourier transform intellectual property core (FFT IP core) that can be mounted on Avalon bus of Nios II processor is designed in this paper, by the means of custombuilt components in SOPC Builder. Not only the data number can be configured to 2n and the data width can be configured as integer or floating-point number of 32 bits, but also the number of inner butterfly units is configurable, which can effectively resolve the contradiction between speed and hardware resource occupanc; 01; 59-66
语种	英语
内容类型	期刊论文
源URL	[http://ir.pku.edu.cn/handle/20.500.11897/480147]
专题	信息科学技术学院
推荐引用方式 GB/T 7714	LIU Sanjun,SUN Linjiao,LI Shaowu,et al. Highly Configurable Floating-Point FFT IP Core with Reusing Method[J]. Wuhan University Journal of Natural Sciences,2013.
APA	LIU Sanjun,SUN Linjiao,LI Shaowu,YI Jinqiao,&MIAO Yuzhuang.(2013).Highly Configurable Floating-Point FFT IP Core with Reusing Method.Wuhan University Journal of Natural Sciences.
MLA	LIU Sanjun,et al."Highly Configurable Floating-Point FFT IP Core with Reusing Method".Wuhan University Journal of Natural Sciences (2013).