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	Insight into multiple-triggering effect in DTSCRs for ESD protection
	Lizhong Zhang ; Yuan Wang ; Yize Wang ; Yandong He
刊名	半导体学报（英文版）
	2017
关键词	electrostatic discharge (ESD) diode-triggered silicon-controlled rectifier (DTSCR) double snapback transmission line pulse (TLP) test electrostatic discharge (ESD) diode-triggered silicon-controlled rectifier (DTSCR) double snapback transmission line pulse (TLP) test
DOI	10.1088/1674-4926/38/7/075001
英文摘要	The diode-triggered silicon-controlled rectifier (DTSCR) is widely used for electrostatic discharge (ESD) protection in advanced CMOS process owing to its advantages,such as design simplification,adjustable trigger/holding voltage,low parasitic capacitance.However,the multiple-triggering effect in the typical DTSCR device may cause undesirable larger overall trigger voltage,which results in a reduced ESD safe margin.In previous research,the major cause is attributed to the higher current level required in the intrinsic SCR.The related discussions indicate that it seems to result from the current division rule between the intrinsic and parasitic SCR formed in the triggering process.In this letter,inserting a large space into the trigger diodes is proposed to get a deeper insight into this issue.The triggering current is observed to be regularly reduced along with the increased space,which confirms that the current division is determined by the parasitic resistance distributed between the intrinsic and parasitic SCR paths.The theoretical analysis is well confirmed by device simulation and transmission line pulse (TLP) test results.The reduced overall trigger voltage is achieved in the modified DTSCR structures due to the comprehensive result of the parasitic resistance vs triggering current,which indicates a minimized multipletriggering effect.; The diode-triggered silicon-controlled rectifier (DTSCR) is widely used for electrostatic discharge (ESD) protection in advanced CMOS process owing to its advantages,such as design simplification,adjustable trigger/holding voltage,low parasitic capacitance.However,the multiple-triggering effect in the typical DTSCR device may cause undesirable larger overall trigger voltage,which results in a reduced ESD safe margin.In previous research,the major cause is attributed to the higher current level required in the intrinsic SCR.The related discussions indicate that it seems to result from the current division rule between the intrinsic and parasitic SCR formed in the triggering process.In this letter,inserting a large space into the trigger diodes is proposed to get a deeper insight into this issue.The triggering current is observed to be regularly reduced along with the increased space,which confirms that the current division is determined by the parasitic resistance distributed between the intrinsic and parasitic SCR paths.The theoretical analysis is well confirmed by device simulation and transmission line pulse (TLP) test results.The reduced overall trigger voltage is achieved in the modified DTSCR structures due to the comprehensive result of the parasitic resistance vs triggering current,which indicates a minimized multipletriggering effect.; the Beijing Natural Science Foundation,China; 7; 93-96; 38
语种	英语
内容类型	期刊论文
源URL	[http://ir.pku.edu.cn/handle/20.500.11897/479334]
专题	信息科学技术学院
推荐引用方式 GB/T 7714	Lizhong Zhang,Yuan Wang,Yize Wang,et al. Insight into multiple-triggering effect in DTSCRs for ESD protection[J]. 半导体学报（英文版）,2017.
APA	Lizhong Zhang,Yuan Wang,Yize Wang,&Yandong He.(2017).Insight into multiple-triggering effect in DTSCRs for ESD protection.半导体学报（英文版）.
MLA	Lizhong Zhang,et al."Insight into multiple-triggering effect in DTSCRs for ESD protection".半导体学报（英文版） (2017).

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