An Energy Efficient Backup Scheme with Low Inrush Current for Nonvolatile SRAM in Energy Harvesting Sensor Nodes | |
Li, Hehe ; Liu, Yongpan ; Zhao, Qinghang ; Gu, Yizi ; Sheng, Xiao ; Sun, Guangyu ; Zhang, Chao ; Chang, Meng-Fan ; Luo, Rong ; Yang, Huazhong | |
2015 | |
英文摘要 | In modern energy harvesting sensor nodes, nonvolatile SRAM (nvSRAM) has been widely investigated as a promising on-chip memory architecture because of its zero standby power, resilience to power failures, and fast read/write operations. However, conventional approaches transfer all data from SRAM into NVM during the backup process. Thus, large on-chip energy storage capacitors are normally required. In addition, high peak inrush current is generated instantaneously, which has a negative impact on energy efficiency and circuit reliability. To mitigate these problems, we propose a novel holistic backup flow, which consists of a partial backup process and a run-time pre-writeback scheme for nvSRAM based caches. A statistics based dead-block predictor is employed to achieve a fast and low power partial backup process. We also present an adaptive pre-writeback point allocation strategy to further reduce the backup load. Simulation results show that, with our proposed backup scheme, energy storage capacitance is reduced by 34% and inrush current is reduced by 54% on average compared to the conventional full backup scheme.; CPCI-S(ISTP); lihh09@mails.tsinghua.edu.cn; ypliu@tsinghua.edu.cn; zqx14@mails.tsinghua.edu.cn; gyz10@mails.tsinghua.edu.cn; x-cheng12@mails.tsinghua.edu.cn; gsun@pku.edu.cn; zhang.chao@pku.edu.cn; mfchang@ee.nthu.edu.tw; luorong@tsinghua.edu.cn; yanghz@tsinghua.edu.cn; 7-12 |
语种 | 英语 |
出处 | Conference on Design Automation Test in Europe (DATE) |
内容类型 | 其他 |
源URL | [http://ir.pku.edu.cn/handle/20.500.11897/460636] |
专题 | 信息科学技术学院 |
推荐引用方式 GB/T 7714 | Li, Hehe,Liu, Yongpan,Zhao, Qinghang,et al. An Energy Efficient Backup Scheme with Low Inrush Current for Nonvolatile SRAM in Energy Harvesting Sensor Nodes. 2015-01-01. |
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