QQ客服 官方微博 反馈留言

	Nanowire Transistor Solutions for 5nm and Beyond
	Asenov, A. ; Wang, Y. ; Cheng, B. ; Wang, X. ; Asenov, P. ; Al-Ameri, T. ; Georgiev, V. P.
	2016
关键词	Compact model Monte Carlo nanowire transistor Poisson-Schrodinger SRAM statistical variability INTRINSIC PARAMETER FLUCTUATIONS SIMULATION MOSFETS VARIABILITY
英文摘要	In this paper we present a comprehensive computational study of silicon nanowire transistor (SNT) and a SNM SRAM cell based on advanced design technology co-optimization (DTCO) TCAD tools. Utilizing this methodology, we provide guidelines and solutions for 5 nm and beyond in CMOS technology. At first, drift-diffusion (DD) results are fully calibrated against a PoissonSchrodinger (PS) solution to calibrate density-gradient quantum corrections, and ensemble Monte Carlo (EMC) simulations to calibrate transport models. The calibrated DD gives us the capability to simulate statistical variability in nanowire transistors of the 5nm node and beyond accurately and efficiently. Various SNT structures are evaluated in terms of device figures of merit, and optimization of SNTs in terms of electrostatics driven performance is carried out. A variability-aware hierarchical compact model approach for SNT is adopted and used for statistical SRAM simulation near the "scaling limit". The scaling of SNTs beyond the 5 nm is also discussed.; CPCI-S(ISTP); asen.asenov@glasgow.ac.uk; 269-274
语种	英语
出处	17th International Symposium on Quality Electronic Design (ISQED)
内容类型	其他
源URL	[http://ir.pku.edu.cn/handle/20.500.11897/450114]
专题	信息科学技术学院
推荐引用方式 GB/T 7714	Asenov, A.,Wang, Y.,Cheng, B.,et al. Nanowire Transistor Solutions for 5nm and Beyond. 2016-01-01.

个性服务

查看访问统计

相关权益政策

暂无数据

收藏/分享

除非特别说明，本系统中所有内容都受版权保护，并保留所有权利。