14-bit 20 mu W column-level two-step ADC for 640 x 512 IRFPA

doi:10.1049/el.2015.0491

CORC > 北京大学 > 信息科学技术学院

	14-bit 20 mu W column-level two-step ADC for 640 x 512 IRFPA
	Wang, Guannan ; Lu, Wengao ; Zhang, Luya ; Zhang, Yacong ; Chen, Zhongjian
刊名	ELECTRONICS LETTERS
	2015
关键词	focal planes infrared detectors analogue-digital conversion IRFPA column-level two-step ADC structure 16-column-shared flash ADC staggered code staggered correction dynamic comparator power dissipation SAR conversion cycle time input voltage variation charge redistribution structure infrared focal-plane array word length 14 bit power 20 muW word length 6 bit power 0 386 muW voltage 1 8 V voltage 5 V power 5 966 muW size 0 18 mum
DOI	10.1049/el.2015.0491
英文摘要	A column-level two-step analogue-to-digital converter (ADC) structure for infrared focal-plane array (IRFPA) is proposed. The first step adopts a 16-column-shared 6-bit flash ADC to accomplish the coarse conversion of 16 columns one by one. Owing to the staggered code and correction, a dynamic comparator is adopted in the flash ADC and the power dissipation of a flash ADC averaged to one column in period is only 0.386 W. The second step is SAR conversion of which the cycle time is prolonged. The input voltage variation of the comparator in the charge redistribution structure is decreased to tens of millivolts; so a 1.8 V power supply is adequate in spite of 5 V V-FS. The power dissipation of this comparator is reduced to 5.966 W. Also, the lower clock frequency of the SAR logic reduces the dynamic power. A 14-bit two-step ADC is designed in 0.18 m process and the equivalent power dissipation of the proposed ADC structure for one column is <20 W.; SCI(E); EI; ARTICLE; wglu@pku.edu.cn; 14; 1054-1055; 51
语种	英语
内容类型	期刊论文
源URL	[http://ir.pku.edu.cn/handle/20.500.11897/418540]
专题	信息科学技术学院
推荐引用方式 GB/T 7714	Wang, Guannan,Lu, Wengao,Zhang, Luya,et al. 14-bit 20 mu W column-level two-step ADC for 640 x 512 IRFPA[J]. ELECTRONICS LETTERS,2015.
APA	Wang, Guannan,Lu, Wengao,Zhang, Luya,Zhang, Yacong,&Chen, Zhongjian.(2015).14-bit 20 mu W column-level two-step ADC for 640 x 512 IRFPA.ELECTRONICS LETTERS.
MLA	Wang, Guannan,et al."14-bit 20 mu W column-level two-step ADC for 640 x 512 IRFPA".ELECTRONICS LETTERS (2015).