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	Modeling and design exploration of FBDRAM as on-chip memory
	Sun, Guangyu ; Xu, Cong ; Xie, Yuan
	2012
英文摘要	Compared to the traditional DRAM technology, floating body DRAM (FBDRAM) has many advantages, such as high density, fast access speed, long retention time, etc. More important, FBDRAM is compatible with the traditional CMOS technology. It makes FBDRAM more competitive than other emerging memory technologies to be employed as on-chip memory. The characteristic variance of memory cells caused by process variations, however, has become an obstacle to adopt FBDRAM. In this work, we build a circuit level model of FBDRAM caches with the consideration of process variations. In order to mitigate the impact of process variations, we apply different error correction mechanisms and corresponding architecture-level modifications to FBDRAM caches and study the trade-off among reliability, power consumption, and performance. With this model, we explore the L2 cache design using FBDRAM and compare it with traditional SRAM/eDRAM caches in both circuit and architectural levels. ? 2012 EDAA.; EI; 0
语种	英语
内容类型	其他
源URL	[http://ir.pku.edu.cn/handle/20.500.11897/412822]
专题	信息科学技术学院
推荐引用方式 GB/T 7714	Sun, Guangyu,Xu, Cong,Xie, Yuan. Modeling and design exploration of FBDRAM as on-chip memory. 2012-01-01.

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