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	Design of FFT processor with low power complex multiplier for OFDM-based high-speed wireless applications
	Jiang, M ; Yang, B ; Fu, YL ; Jiang, AP ; Wang, XA ; Gan, XW ; Zhao, BY ; Zhang, TY
	2004
关键词	Fast Fourier Transform low power design OFDK wireless application ARCHITECTURES
英文摘要	In this paper, we introduce a fixed-point 16bit 64point FFT processor for OFDM-based wireless applications. The processor is based on DIT radix-2 butterfly FFT algorithm. The canaonical signed digital is used to implement constant complex multiplications with CSA tree for lower power and cost. The simulation shows the module can reach low cost\power and high speed for OFDM-based high-speed wireless applications.; Computer Science, Artificial Intelligence; Engineering, Electrical & Electronic; Telecommunications; CPCI-S(ISTP); 1
语种	英语
内容类型	其他
源URL	[http://ir.pku.edu.cn/handle/20.500.11897/406914]
专题	信息科学技术学院
推荐引用方式 GB/T 7714	Jiang, M,Yang, B,Fu, YL,et al. Design of FFT processor with low power complex multiplier for OFDM-based high-speed wireless applications. 2004-01-01.

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