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	Design and Implementation of Sigma Delta AD Converter
	Huang, Jie ; Cui, Yingying ; Cui, Xiaoxin ; Yu, Dunshan
	2009
关键词	oversampling noise shaping MASH decimation MODULATION
英文摘要	An efficient design and implementation of a sigma-delta (Sigma Delta) analog-to-digital (AD) converter which realizes 16 bit resolution is described in this paper. In 16 and 32 times decimation lowpass mode, and 32 times decimation bandpass mode, signal-to-noise ratio (SNR) achieves 90dB respectively. The Sigma Delta modulator is designed in 2-1-1-1 multistage noise shaping (MASH) structure. The decimation filter which is designed in multistage cascade structure is realized with add-and-shift scheme to avoid the usage of any multiplier. The AD converter is implemented in a 0.35um technology, the area of the Sigma Delta modulator is 4.1mmx1.9mm, the core area of the decimation filter is 5.4mmx3.6mm(1).; http://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcApp=PARTNER_APP&SrcAuth=LinksAMR&KeyUT=WOS:000289818000090&DestLinkType=FullRecord&DestApp=ALL_WOS&UsrCustomerID=8e1609b174ce4e31116a60747a720701 ; Engineering, Electrical & Electronic; CPCI-S(ISTP); 0
语种	英语
内容类型	其他
源URL	[http://ir.pku.edu.cn/handle/20.500.11897/293186]
专题	信息科学技术学院
推荐引用方式 GB/T 7714	Huang, Jie,Cui, Yingying,Cui, Xiaoxin,et al. Design and Implementation of Sigma Delta AD Converter. 2009-01-01.

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