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	A Reconfigurable Pipelined Architecture for Convolutional Neural Network Acceleration
	Xue, Chengbo[1]; Cao, Shan[2]; Jiang, Rongkun[3]; Yang, Hao[4]
	2018
会议名称	2018 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS)
会议日期	2018-01-01
关键词	Convolutional neural network inter-layer pipeline hardware accelerator machine learning
URL标识	查看原文
内容类型	会议论文
URI标识	http://www.corc.org.cn/handle/1471x/2168869
专题	上海大学
作者单位	1.[1]Beijing Inst Technol, Sch Informat & Elect, Beijing 100081, Peoples R China. 2.[2]Shanghai Univ, Shanghai Inst Adv Commun & Data Sci, Joint Int Res Lab Specialty Fiber Opt & Adv Commu, Key Lab Specialty Fiber Opt & Opt Access Networks, Shanghai, Peoples R China. 3.[3]Beijing Inst Technol, Sch Informat & Elect, Beijing 100081, Peoples R China. 4.[4]Beijing Inst Technol, Sch Informat & Elect, Beijing 100081, Peoples R China.
推荐引用方式 GB/T 7714	Xue, Chengbo[1],Cao, Shan[2],Jiang, Rongkun[3],et al. A Reconfigurable Pipelined Architecture for Convolutional Neural Network Acceleration[C]. 见:2018 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS). 2018-01-01.

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