Design on Multi-bit Adder Using Sense Amplifier-Based Pass Transistor Logic for Near-Threshold Voltage Operation (CPCI-S收录) | |
Dang, Fangyuan[1,2]; Wang, Yuan[2]; Liu, Yuequan[2]; Jia, Song[2]; Zhang, Xing[2] | |
关键词 | Near-threshold voltage (NTV) low-power sense amplifier double pass-transistor logic (DPL) multi-bit adder |
URL标识 | 查看原文 |
内容类型 | 会议 |
URI标识 | http://www.corc.org.cn/handle/1471x/2041419 |
专题 | 华南理工大学 |
推荐引用方式 GB/T 7714 | Dang, Fangyuan[1,2],Wang, Yuan[2],Liu, Yuequan[2],等.Design on Multi-bit Adder Using Sense Amplifier-Based Pass Transistor Logic for Near-Threshold Voltage Operation (CPCI-S收录). |
个性服务 |
查看访问统计 |
相关权益政策 |
暂无数据 |
收藏/分享 |
除非特别说明,本系统中所有内容都受版权保护,并保留所有权利。
修改评论