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	A High Data-Rate Software Defined Radio Receiver Suited for FPGA Platforms
	Chen Zhijun ; Zhan Yafeng ; Lu Jianhua
	2010-10-12 ; 2010-10-12
关键词	FPGA APRX optimization partitioned convolution Telecommunications
中文摘要	Although Alternate Parallel Receiver (APRX) Could effectively improve the maximum demodulating rate of the receiver, its frequency domain processing module consumes a large amount Of Multiplication units when the number of parallel input channels is large, making it unsuitable for use on FPGA software defined radio platforms. This paper proposes,in optimization scheme by introducing partitioned Convolution and exploring the spectrum characteristic of the APRX input data, reducing the usage of multipliers greatly. After the optimization, the number of real Multipliers used in the Frequency-domain processing module of the 16-ary APRX is reduced from about 576 to 68, with little performance loss. This optimized APRX is fairly Suitable for FPGA software defined radio platform applications.
语种	英语 ; 英语
出版者	CHINA INST COMMUNICATIONS ; BEIJING ; NO 13 WEST CHANG AN AVENUE, BEIJING, 00000, PEOPLES R CHINA
内容类型	期刊论文
源URL	[http://hdl.handle.net/123456789/82605]
专题	清华大学
推荐引用方式 GB/T 7714	Chen Zhijun,Zhan Yafeng,Lu Jianhua. A High Data-Rate Software Defined Radio Receiver Suited for FPGA Platforms[J],2010, 2010.
APA	Chen Zhijun,Zhan Yafeng,&Lu Jianhua.(2010).A High Data-Rate Software Defined Radio Receiver Suited for FPGA Platforms..
MLA	Chen Zhijun,et al."A High Data-Rate Software Defined Radio Receiver Suited for FPGA Platforms".(2010).

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