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	A time synchronization mechanism and algorithm based on phase lock loop
	Ren Feng-Yuan ; Dong Si-Ying ; He Tao ; Lin Chuang
	2010-05-06 ; 2010-05-06
关键词	Practical/ clocks compensation phase locked loops synchronisation wireless sensor networks/ time synchronization mechanism phase lock loop computer clock unidirectional reference broadcast synchronization mechanism offset compensation drift compensation wireless sensor networks/ B6250 Radio links and equipment B1250 Modulators, demodulators, discriminators and mixers B1265Z Other digital circuits
中文摘要	In this paper, the analysis model of computer clock is discussed, and the characteristic of the existing synchronization mechanisms is summarized. Subsequently, a unidirectional reference broadcast synchronization mechanism with low power is developed, and this mechanism can achieve simultaneously the offset compensation and drift compensation. Its implementation algorithm is designed based on the principle of traditional phase locked loop (PLL). In order to avoid introducing the extra hardware, a simple digital PLL is constructed. Finally, the validation is done on the Mica2 experimental platform, and the performance is evaluated and compared with the typical algorithms.
语种	中文 ; 中文
出版者	Science Press ; China
内容类型	期刊论文
源URL	[http://hdl.handle.net/123456789/10122]
专题	清华大学
推荐引用方式 GB/T 7714	Ren Feng-Yuan,Dong Si-Ying,He Tao,et al. A time synchronization mechanism and algorithm based on phase lock loop[J],2010, 2010.
APA	Ren Feng-Yuan,Dong Si-Ying,He Tao,&Lin Chuang.(2010).A time synchronization mechanism and algorithm based on phase lock loop..
MLA	Ren Feng-Yuan,et al."A time synchronization mechanism and algorithm based on phase lock loop".(2010).

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